搜索资源列表
coeff_rom_1_6
- FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
coeff_rom_2_5
- FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
coeff_rom_3_4
- FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
adder
- FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
FPGAFIR
- FPGA-based high-order FIR filter design
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
fir
- 使用verilog语言实现的fir滤波器，使用了内部的触发器资源，优化。-Verilog language used to achieve the fir filter, the use of internal resources of the flip-flop, and optimize.
fir
- 16阶FIR VHDL程序并附带testbench，并有简单流水线设计！-16 Tap FIR vhdl code with testbench and pipelining design
Xilinx-FIR
- 基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
fir_filter_verilog
- FIR filter verilog project
cic_intp_64_four
- 4阶CIC内插滤波器，内插系数64，Verilog版本，数字下变频-4-order interpolating CIC filter interpolation factor of 64, Verilog version of the digital down-conversion
fir_dec3
- FIR抽取滤波器，抽取系数3，Verilog版本，数字下变频-FIR decimation filter, extraction coefficient of 3, Verilog version of the digital down-conversion
FIR64tap
- 使用verilog语言实现64阶FIR,调试可以通过-64 taps FIR with verilog
fir
- 做作业的时候用VERILOG编写的FIR滤波器程序，希望对大家有用-Homework time FIR filter with VERILOG written procedures, we want to be useful
FIR
- 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
VerilogFIR
- low pass FIR filter programmed by Verilog, you can change the coefficients in the program to achieve different response
dilbalu_fir7
- basic fir filtering in verilog fpga in vhdl
FIR-verilog
- FIR filter verilog code
fir filter design
- FIR FILTER DESIGN IN VERILOG ON FPGA
fir
- 基于verilog的 FIR低通滤波器的实现(Implementation of FIR low pass filter based on Verilog)